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71M6543F/71M6543G Data Sheet
Table 6: I/O RAM Control Bits for Isolated Sensor
8
R/W
Name
RCMD[4:0]
Address
SFR
FC[4:0]
RST WAKE
Default Default
0 0
R/W Description
When the MPU writes a non-zero value to RCMD ,
the 71M6543 issues a command to the cor-
responding isolated sensor selected with
RCMD[1:0] . When the command is complete, the
71M6543 clears RCMD[4:2]. The command code
itself is in RCMD[4:2].
PERR_RD
PERR_WR
CHOPR[1:0]
TMUXR2[2:0]
TMUXR4[2:0]
TMUXR6[2:0]
RMT_RD[15:8]
RMT_RD[7:0]
RFLY_DIS
SFR FC[6]
SFR FC[5]
2709[7:6]
270A[2:0]
270A[6:4]
2709[2:0]
2602[7:0]
2603[7:0]
210C[3]
0
00
000
000
000
0
0
0
00
000
000
000
0
0
R/W
R/W
R/W
R/W
R/W
R
R/W
The 71M6543 sets these bits to indicate that a
parity error on the isolated sensor has been de-
tected. Once set, the bits are remembered until
they are cleared by the MPU.
The CHOP settings for the isolated sensors.
00 – Auto chop. Change every multiplexer frame.
01 – Positive
10 – Negative
11 – Same as 00
The TMUX bits for control of the isolated sensor.
The TMUX bits for control of the isolated sensor.
The TMUX bits for control of the isolated sensor.
The read buffer for 71M6xx3 read operations.
Controls how the 71M6543 drives the 71M6xx3
power pulse. When set, the power pulse is driven
high and low. When cleared, it is driven high
followed by an open circuit fly-back interval.
RMT2_E
RMT4_E
RMT6_E
2709[3]
2709[4]
2709[5]
0
0
0
0
0
0
Enables the isolated remote sensor interface and
R/W re-configures pins IADC2-IADC3 as a balanced
pair digital remote interface.
Enables the isolated remote sensor interface and
R/W re-configures pins IADC4-IADC5 as a balanced
pair digital remote interface.
Enables the isolated remote sensor interface and
R/W re-configures pins IADC6-IADC7 as a balanced
pair digital remote interface.
Refer to Table 70 starting on page 102 for more complete details about these I/O RAM locations.
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